![]() If you can thoroughly understand the operation of this circuit, so that you know it cold backwards and forwards, you'll be in good shape for the problems you will later face. ![]() So you may not need current gain at all, so how are you going to convert the current gain of a transistor into the voltage gain ? The current into the load resistor should be 0.5 mA rms max, With 10 ♟ at 60 Hz you have a 270 Ω source impedance so you know how high, minimum, the base bias network values should be.Į.g., 1.2 k in parallel with 12 k is ~1 k, and this paralleled value should be >5 x 270 Ω, so you could raise this somewhat.ġ k and 10 k in parallel is about ~1 k, and 1 k is about 1/10 th of 270 Ω + 10 k, so maybe the possible maximum output impedance of this circuit is OK Ġ.5 v/270 Ω = ~ 2 mA rms max input current able to be sourced by the input signal, and If it doesn't work on paper first it won't work in the real world. ![]() 1, 10, 100 is too coarse for this application.ĭo the math in your head, 'cause computers crash more often than your head does. You don't even need a calculator, just figure order-of-magnitude resistor values, like 1, 2, 5, 10, 20 or even 1, 3, 10, 30, all evenly spaced on a log scale. Run some calculations with pencil & paper. You also should know that the DC/AC equivalent circuit for a power supply is an ideal voltage source in series with zero impedance.ĭo you just need level shifting and no gain at all ?ĭo you need power gain ? You need a max voltage gain, Vout/Vin, of 10^(20/20) so you know how many volts rms out you should be seeing with 500 mV rms in. The very last thing you do with this method is to specify actual component values of those things "inside the box". This is the most abstract level of this design it is a top down approach. Think of the circuit as a box that has to meet input and output specs. Why so long-winded? I need practice in tech writing in case I ever get another engineering job.Įverything you need has been posted. If so, what is the order? Why this order? Are the paragraphs in this post, and these questions, arranged in any particular order? Speaking of your own effort, for extra credit, three questions: What I'm getting at here is that you should think in terms of 1.0, 1.2, 1.5 or even more widely spaced resistance values, rather than 1.0, 1.1, 1.2, 1.5, and Using resistors of 10% or 20% tolerance are probably good enough since your gain spec has quite a wide interval. If you think in terms of KΩ rather than Ω it will probably go easier and The current through R1 and R2 should be >5x than the current into the base and It would help if you were conversant with Leon Charles Thevenin and The Vbe at turn-on for a silicon transistor is ~0.5 v and it is fully on at ~1 v andįor temp insensitivity RE should be >5x the internal Re of the transistor and You should first pick an equivalent circuit for your transistor, something with at least one ideal diode in it and The resistance looking into the circuit input should be >5x greater than the impedance of your input coupling capacitor at the freq. These electrons will attempt to recombine with the majority base holes, however, because the base is physically thin and lightly doped, only a small percentage of the injected electrons will recombine with base holes and exit the base terminal back to ground.The circuit output resistance looking into the collector should be >5x smaller than the load resistor and As long as there is sufficient potential from the emitter supply, the electrons will be pushed into the base. The base-emitter depletion creates an energy hill just as it did with a single PN junction. From the left side of the diagram, electrons exit the emitter supply and enter the N emitter. \): Forward-reverse bias, electron flow.Įlectron flow will facilitate this explanation so we'll draw the current directions using dashed lines.
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